Sep 14, 2013 #1 G gnoble29 Member level 1 Joined Jun 30, 2010 Messages 38 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Location india Visit site Activity points 1,528 During integration of different parts of my digital circuit,the output voltage of one section [which needs to drive an nmos] is dropping from1.8v to 0.4v.How can I avoid this?
During integration of different parts of my digital circuit,the output voltage of one section [which needs to drive an nmos] is dropping from1.8v to 0.4v.How can I avoid this?
Sep 14, 2013 #2 P pinout Full Member level 3 Joined Aug 16, 2013 Messages 178 Helped 52 Reputation 104 Reaction score 49 Trophy points 1,308 Location Cornwall UK Visit site Activity points 2,771 Can you post a circuit diagram. It sounds like you source impedance is too high or the opposite, your load impedance is too low.
Can you post a circuit diagram. It sounds like you source impedance is too high or the opposite, your load impedance is too low.