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Vias covered in solder resist get outgassing problems?

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treez

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Hi
We have a load of 0.3mm vias on our 4 layer PCB. Surely it will be OK if I coat them in solder resist? We wont get “outgassing”?
(Outgassing is where covered over vias explode in the PCB assembly bath)

I prefer them covered over, even though Eagle seems to tend toward leaving them free of solder resist. It just seems more of a risk for shorting between uncovered vias, and moisture problems.
 

Again today, we got criticised by our board manufacturer for having 0.3mm vias with their restrings covered over in solder resist. They told us they must plug them with solder resist otherwise solder resist will flow into them.....but doesnt "plugging them with solder resist" mean putting solder resist into them anyway?
 

Some cover vias, some don't can't say I have noticed any difference these days...
I think there may be some confusion regarding the use of liquid photo imageable solder resist. I would ask them to explain more clearly... LPISM is sprayed on, exposed to light then the non exposed bits washed off so the whole PCB gets covered. Ask them for more clarity.
 
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Depends on how the resist cures, and what it might have
trapped in those vias. Good board clean process (which
would be proven by inspection) and a resist that cures
chemically rather than by solvent bake-out, ought to do
the job. Your board house should be able to propose you
a "NASA approved" production (they're as outgassing
sensitive as you can get) or you can find one that will.

"Across the pond", call it "ESA approved"....
 
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Don't need to go to NASA or ESA levels in reality...
To be honest out-gassing is an old issue, very few boards suffer from it today. There has been a previous long thread on this, in fact probably more than 1.
PCB's going into space often don't have a solder resist so the problem is not an issue in space...
And can anyone hear you outgas in space!
 
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As far as I understand the boards of interest are not going to space.

A compromise is to have a reduced solder mask opening (e.g. drill diameter + 0.1 mm) for all vias. This safely avoids vias draining solder unintentionally or even shorts. And gives spare test points.
 
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