tj.diego
Junior Member level 2
[SOLVED] vhdl testbench strange problem with a ripple carry select
Hi all,
i have a strange problem with a testbench, if i define the inputs separately i have no problem,but if i use two for loops to have more combinations easly the second input BB9 is equal to "UUUUUUUUUU" like the output!
could you have a look to these files?
thanks a lot in advance
the circuit is a ripple carry select (9bits)View attachment rcsel.vhd.txtView attachment rcselTB.vhd.txt
ps i have also a doubt about the sensitivity list of the process on the mux, if i have a empty sensitivity list, it doesn't work!
Hi all,
i have a strange problem with a testbench, if i define the inputs separately i have no problem,but if i use two for loops to have more combinations easly the second input BB9 is equal to "UUUUUUUUUU" like the output!
could you have a look to these files?
thanks a lot in advance
the circuit is a ripple carry select (9bits)View attachment rcsel.vhd.txtView attachment rcselTB.vhd.txt
ps i have also a doubt about the sensitivity list of the process on the mux, if i have a empty sensitivity list, it doesn't work!
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