[vhdl]how to implement "division" ?thx!!

[vvsvv]

esp. when the divisor is 720,
what shall I do in vhdl?

man I :

.......
if(count/720=2) then
..............................
OR

if(count mod 720 )

.........................
thank u very much!

 

[vkchau]

As I know, in almost synthesizers, divisor must be power of 2, e.g. 2, 4, 8, 16,... Therefore, you must write VHDL code to implement divider, or use available code libraries for divider.

 

[vvsvv]

thanks.
however , is it to say"the divisor must be 2. 4.8 .16....... "?
do you know where I may find the library which include the division?

thanks again!

 

[vkchau]

Yes, other divisors is not supported by synthesizers when signals is std_logic_vector. I have this code, I will send to you early.

 

[vkchau]

Sorry, my network is down. You can download it at www.opencores.org: Hardware Divide Unit.

 

[hyperion007]

you can use shift and subtration to implement it