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vhdl code for division of two fixed point numbers

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ammassk

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dear all,

I need to do the division of two fixed point numbers.Can anybody help me to do coding for this.

eg: 1.75 /1.5

1.75 is 0000000111000000(16 bit representation)
1.5 is 0000000110000000(16 bit representation).

1.75 /1.5=1.166667. =0000000100101011.
 

yes, the simplest VHDL is:

output <= input1 / input2;

using the numeric_std or fixed point library.

But this will only produce a maximum pipeline length of 1. To get better pipelining, you need to use a divider IP core, which is provided by both altera and xilinx.
 

You must have heard about library named fixed_pkg.In terms of complexity this library can be placed some where between integer math and floating point maths.
e.g.
Code:
library ieee_proposed;
use ieee_proposed.fixed_pkg.all;

Restoring Algorithm, Successive division method can also be used
 
I tried this. But not getting the correct answer. I used the library numeric_std also.

- - - Updated - - -

I tried restoring algorithm and got correct answer.But I got quotient and reminder separately. But my problem is I need to get this together as answer.
Eg: for 4/3 , getting quotient as 1 and reminder as 1. But I need to get the answer as 1.3. How it is possible?
 

you need to change the number of fraction bits you use.
 

yes, the simplest VHDL is:

output <= input1 / input2;

using the numeric_std or fixed point library.

But this will only produce a maximum pipeline length of 1. To get better pipelining, you need to use a divider IP core, which is provided by both altera and xilinx.

hi,
I am not able to use / operator for division.I am getting error like this" Operator <INVALID OPERATOR> must have constant operands or first operand must be power of 2"Can anyone tel me wat to do?Thanks in advance
-->
 

Yes, the division operator works fine in simulation, but some synthesisors put restrictions on it's use, mainly because a single clock cycle divide is very slow, so they think anyone doing it is silly (divide by 2^n is just a bit shift and therefore free to implement). You should use the divider cores provided by your chip vendor.
 

For clarity, you should tell about the synthesis tool and imported libraries.
 

hi ammassk
you can use fixed ponit library provided by bishop
search it on google and will get many result
regards
 

You can find some VHDL code from "Circuit Design with VHDL Volnei A. Pedroni".
 

hi,
I am not able to use / operator for division.I am getting error like this" Operator <INVALID OPERATOR> must have constant operands or first operand must be power of 2"Can anyone tel me wat to do?Thanks in advance
-->

Google for the source code for 'lpm_divide'. This is a pipelined, fast divider that can produce a new output on every clock cycle. If you really need the result of the division completed on the same clock cycle, then you will get a large, slow implementation...once you find a tool that allows you to synthesize '/'.

Kevin
 

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