VHDL code for connecting ADC to FPGA

[aria62]

vhdl code for adc

dear friends,
I'm learning VHDL .i want an example of VHDL code for connecting a flash ADC
to the FPGA.

thanks a lot

 

[alieeldin]

adc vhdl

you will make only block to read the word from ADC and then make your decision

if you want this block send for me
--
alie eldin

 

[vishwa]

vhdl adc

Hi

The interface between ADC and FPGA is not the unique, because it is different for different available ADCs in market.

So first, you decide which ADC you are going to use. Then from the datasheet of ADC, we can design proper interface between ADC and the FPGA.

 

[coolsniper]

adc fpga

if the ADC here is Anolog Digtial Converter, the first thing to design the interface is send a clock to ADC.

 

[aria62]

adc with fpga

thank you all for your help.
dear vishwa this is the datasheet of my ADC: TDA8703

 

[alieeldin]

adc in fpga

hi
for example if you work the FPGA or CPLD on 50Mhz you will make clock divider to get the 40Mhz which will operate the ADC
and then make process with sensetivity list on (input clock and the input data from ADC)
this process will operate when the rising edge of clk or the variation in the input from ADC and then save this data in buffer and so ...

note :
if you work by verilog replace process to always

i hope that i can help you
---
alie eldin

 

[prankris]

adc vhdl code

hello
can i get the vhdl code for interfacing adc 0801 to altera up2 education kit

 

[missbirdie]

adc+fpga

hi.. If u r using an FPGA starter kit u may find ADC & DAC already existing in the kit...then all u have to do is to enable it by using SPI interface i think.. u'd better check the user guide i guess.. i hope this what u need.

 

[bmsec]

Re: adc vhdl

you will make only block to read the word from ADC and then make your decision

if you want this block send for me
--
alie eldin

I have a similar project wherein :
1.There is an onboard ADC in Altera fpga Stratix II EP2S180 kit, to accept analog waveform.
2.The ADC output has to be digitally amplified by the vhdl code dumped in fpga.
3.The amplified output goes to DAC and outputted.

Kindly tell me about the DAC and the ADC.