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//=======================================================
// PORT declarations
//=======================================================
//////////// CLOCK //////////
input CLOCK_50;
//////////// LED //////////
output [7:0] LED;
//////////// KEY //////////
input [1:0] KEY;
//////////// Accelerometer and EEPROM //////////
output G_SENSOR_CS_N;
input G_SENSOR_INT;
output I2C_SCLK;
inout I2C_SDAT;
//=======================================================
// REG/WIRE declarations
//=======================================================
wire dly_rst;
wire spi_clk, spi_clk_out;
wire [15:0] data_x;
//=======================================================
// Structural coding
//=======================================================
// Reset
reset_delay u_reset_delay (
.iRSTN(KEY[0]),
.iCLK(CLOCK_50),
.oRST(dly_rst));
// PLL
spipll u_spipll (
.areset(dly_rst),
.inclk0(CLOCK_50),
.c0(spi_clk), // 2MHz
.c1(spi_clk_out)); // 2MHz phase shift
// Initial Setting and Data Read Back
spi_ee_config u_spi_ee_config (
.iRSTN(!dly_rst),
.iSPI_CLK(spi_clk),
.iSPI_CLK_OUT(spi_clk_out),
.iG_INT2(G_SENSOR_INT),
.oDATA_L(data_x[7:0]),
.oDATA_H(data_x[15:8]),
.SPI_SDIO(I2C_SDAT),
.oSPI_CSN(G_SENSOR_CS_N),
.oSPI_CLK(I2C_SCLK));
// LED
led_driver u_led_driver (
.iRSTN(!dly_rst),
.iCLK(CLOCK_50),
.iDIG(data_x[9:0]),
.iG_INT2(G_SENSOR_INT),
.oLED(LED));
endmodule
The problem isn't related to Verilog or VHDL coding. You need to check the pins assignments. The archived project compiles in Quartus V11 as is, so you apparently have applied changes to it.i tested and doesn't work.....
Error listed from the quartus
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