nachiketkhasbag
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Hi,
We are trying to build a VGA controller on a Nexys3 Spartan 6 FPGA. Initially we just wish to run the sample VGA example provided my Xilinx.
In the Xilinx 14.4 XPS we built the base system and set the video base address to 2MB lower than the higher address of my 16MB RAM.
After building a BSP and configuring it in SDK, I built an application project and added the source files given by Xilinx in it's tft_v3_01_a folder.
But my VGA is not working. I checked on scope by connecting to HSYNC and VSYNC signals on the connector. I get no signal.
This may be a reason that my tft screen does not come out of sleep mode. But it's an example provided by Xilinx. It should work.
Could someone tell me where I may be going wrong?
We are trying to build a VGA controller on a Nexys3 Spartan 6 FPGA. Initially we just wish to run the sample VGA example provided my Xilinx.
In the Xilinx 14.4 XPS we built the base system and set the video base address to 2MB lower than the higher address of my 16MB RAM.
After building a BSP and configuring it in SDK, I built an application project and added the source files given by Xilinx in it's tft_v3_01_a folder.
But my VGA is not working. I checked on scope by connecting to HSYNC and VSYNC signals on the connector. I get no signal.
This may be a reason that my tft screen does not come out of sleep mode. But it's an example provided by Xilinx. It should work.
Could someone tell me where I may be going wrong?