[SOLVED] VGA controller for spartan 3

[Basu_Gouda]

Hi

I am building an under water image processing system for which i need to display on the TFT through VGA, the problem is i dont have the kit which has built in VGA port in the PCB and hence I need to build on externally which I can connect to the i.o ports of the PCB. kindly guide me through to build a VGA port and controller.

Thanks in advance

 

[matrixofdynamism]

I strongle recommend that you watch the youtube video from "Tony T800" titled "FPGA Tutorial 4. VGA in VHDL on Altera DE1 Board". it is 29 min 40 sec long. However, the concept is completely transferrable. I learnt how to make VGA block by watching this video.

Caution: Most likely you will use a Video DAC to generate the analogue RGB signals that goto the display unit. This part is an independant problem. You can use the Video DAC on the DE2 board for guidance. Basically the 8 or 10 bit video signals shall go into this DAC since the display needs analogue input.

If you want to read it then I think the following are decent options, both are books:
FPGA Prototyping by VHDL Examples - Xilinx Spartan-3 Version
Embedded SoPC design with Nios II (Altera)

 

[Basu_Gouda]

Thanks for the reply it really helped me out. but now I have a issue that i have only 4MHz oscillator connected to my board is there anyway of using an internal clock or any other way to increase the clock as the display which i have chosen is needs 32MHz.


Thanks in advance

 

[matrixofdynamism]

I assume that you are talking about the so called pixel clock which depends on the vga resolution and refresh rate and will be used to generate the horizontal and vertical synchronization signals with correct timing for the display unit.

Is this 4MHz oscillator being used to feed the fpga? If so and you need a different frequency then PLL is the way to go.

Using PLL you can use a base clock coming from the external source into the FPGA and multiply it by an arbitrary factor of the form p/q. You can thus generate a higher or a lower frequency using it. I had to use a PLL in my design too. The guy in that YouTube video used a PLL a far as I can remember.

I have worked with Altera FPGAs. Their low end FPGAs also have PLLs. I would assume the same for Xilinx.

 

[ads-ee]

Thanks for the reply it really helped me out. but now I have a issue that i have only 4MHz oscillator connected to my board is there anyway of using an internal clock or any other way to increase the clock as the display which i have chosen is needs 32MHz.


Thanks in advance

I don't believe either Xilinx or Altera have a PLL that can accept an input clock frequency of 4MHz. The last few times I was dealing with lower clock frequencies as inputs to their PLLs it was something like 10-19 MHz depending on the parts. I'd have to go through the datasheets to be sure of the numbers, but I think it's best if you go through the data sheets instead as it is a good learning experience.

 

[Basu_Gouda]

I don't believe either Xilinx or Altera have a PLL that can accept an input clock frequency of 4MHz. The last few times I was dealing with lower clock frequencies as inputs to their PLLs it was something like 10-19 MHz depending on the parts. I'd have to go through the datasheets to be sure of the numbers, but I think it's best if you go through the data sheets instead as it is a good learning experience.

Hi You are right the minimum clock input taken to the ip core of DCM as 18MHz. What is the alternative for this

 

[ads-ee]

External PLL, or what most people do is have a clock that is at a higher frequency and divide it down with a PLL to the correct frequencies needed.

Your video board getting a 4 MHz "system clock" seems to indicate a lack of system design having been done.