femystika08
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Hi guys,
I created a module in veriloga where I used some resistors and capacitors etc..
when I save the file I get this log from the CIW saying the components used are bound to the analogLib
but when I try to simulate I get this error messages
I changed
cap #(.c(1)) Cx(x, gnd); to capacitor #(.c(1)) Cx(x, gnd);
res #(.r(1T)) Raux(x, gnd); to resistor #(.r(1T)) Raux(x, gnd);
and on the CIW window this is the log I get
Any thoughts?
I created a module in veriloga where I used some resistors and capacitors etc..
Code:
cap #(.c(1)) Cx(x, gnd);
res #(.r(1T)) Raux(x, gnd);
res #(.r(Rofff)) Roff(aux, minus);
vdc #(.vdc()) Emem(plus,aux);
idc #(.idc()) Gx(gnd, x);when I save the file I get this log from the CIW saying the components used are bound to the analogLib
Code:
Structure summary for module "test1"
child bound to (library view)
--------------------------------------
Cx (analogLib - view symbol)
Raux (analogLib - view symbol)
Roff (analogLib - view symbol)
Emem (analogLib - view symbol)
Gx (analogLib - view symbol)
******************************************but when I try to simulate I get this error messages
Code:
Error found by spectre in `sim_test1', during circuit read-in.
ERROR (SFE-23): "/home/olumodeji/veriloga.va" 33: Cx is an instance of an undefined model cap.
ERROR (SFE-23): "/home/olumodeji/veriloga.va" 34: Raux is an instance of an undefined model res.
ERROR (SFE-23): "/home/olumodeji/veriloga.va" 35: Roff is an instance of an undefined model res.
ERROR (SFE-23): "/home/olumodeji/veriloga.va" 36: Emem is an instance of an undefined model vdc.
ERROR (SFE-23): "/home/olumodeji/veriloga.va" 37: Gx is an instance of an undefined model idc.I changed
cap #(.c(1)) Cx(x, gnd); to capacitor #(.c(1)) Cx(x, gnd);
res #(.r(1T)) Raux(x, gnd); to resistor #(.r(1T)) Raux(x, gnd);
and on the CIW window this is the log I get
Code:
Structure summary for module "test1"
child bound to (library view)
--------------------------------------
Cx (undefined)
Raux (undefined)
Roff (undefined)
Emem (analogLib - view symbol)
Gx (analogLib - view symbol)
******************************************Any thoughts?