PG1995
Full Member level 5
Hi
Yesterday, I borrowed a book from someone and the book had a companion CD. Out of curiosity, I checked out the CD's contents and also read the introduction pages of the book. The book said the CD contained Verilog HDL files for some of the examples in the book with the software Verilogger Pro, Waveform Viewer, etc.
The files had 'v' extension which I wasn't able to open even after installing the Verilogger Pro. But I was successful in opening the file with the Notepad. The code below had the contents of one of the files.
After little searching on the net I came to know that Verilog is hardware description language (HDL) and Verilogger Pro is a simulator. Does it mean that if a write a certain code then the simulator can tell me how that code will be implemented like which component you will need etc.? Is HDL primarily used for digital logic?
How do I open that 'v' extension file?
Please help me with the queries above. Thank you very much.
Regards
PG
Yesterday, I borrowed a book from someone and the book had a companion CD. Out of curiosity, I checked out the CD's contents and also read the introduction pages of the book. The book said the CD contained Verilog HDL files for some of the examples in the book with the software Verilogger Pro, Waveform Viewer, etc.
The files had 'v' extension which I wasn't able to open even after installing the Verilogger Pro. But I was successful in opening the file with the Notepad. The code below had the contents of one of the files.
After little searching on the net I came to know that Verilog is hardware description language (HDL) and Verilogger Pro is a simulator. Does it mean that if a write a certain code then the simulator can tell me how that code will be implemented like which component you will need etc.? Is HDL primarily used for digital logic?
How do I open that 'v' extension file?
Please help me with the queries above. Thank you very much.
Regards
PG