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I am currently working on a project "AES 128 bits ENCRYPTION DECRYPTION", using Verilog HDL.

Now the problem I am facing is that while simulation- if i provide a plain text all zeros, it gets decrypted perfectly. But when i provide a big number like all ones in plain text, the decryption doesnt work perfectly i.e. i dont get the original plaintext. I tried with various plaintexts like for some i get the decryption perfect but for some i dont get the accurate decryption output.

I also cross-checked my logic, it is correct...

Can you please help me with this? What can be the solution for this problem?


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