Verilog code for FIR Filter

[arunragavan]

fir filter verilog

Well guys can anyone gimme an example verilog code for FIR filter.. ive done n VHDL.. am not any good n verilog.. some one who can help me..
with regards,

 

[adap]

verilog code for fir filter

My opinion is that if you have a ready working code in VHDL then the best is to translate it in Verilog using a tool but better doing it by hand.
It's time consuming yes but if you take it line by line and using a Verilog book then you will have the benefit of learning Verilog too.
And from my experience you need to be familiar with both languages.
If you need any help with the translation we are here !!

 

[aravind]

fir filter vhdl code

it is not different to convert vhdl to verilog by using tools
better do it ur self then only u can understand both.
it is not difficult to do for HDL desigers.
try by urself
bye

 

[GroundCtrl]

fir verilog

Go to Xilinx appnotes web-page. There are huge of various examples. Several examples - are FIR filters for one- and two-dimentional signals.

 

[eda_wiz]

vhdl code for fir filter

https://www.altera.com/support/examples/verilog/ver_base_fir.html

try this

 

[realtek]

verilog coding examples

in
h**p://www.@ltera.com/support/examples/verilog/ver_base_fir.html

the example use 3 altera IP(LPM)
is there any example only use RTL (no IP) to implement a simplest FIR?

 

[jarodz]

verilog fir

You can think the FIR is consisted of shift registers and multiplier-adders just as figured in the link.

For me, I will coding the all shift-registers in one always block and the remainder combination(*, +) in another always block(Today, the synthesis tool is very powerful, you can leave the effort of combination optimization, especailly mac to tool).

Regards,
Jarod