Verilog-A and transistor-level in the same cellview, how?

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aoshater

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I have a system in verilog-a functioning properly. The circuit designers sent me their schematics .. i want to use the same library and cell views of each block in verilog and just add the schematic to it. Is that possible? To clarify what i mean, example:

I want to have a Cell View "D-FF"
->veriloga
->schematic
->symbol

And from the system schematic, i can like choose the symbol of D-FF to use either the veriloga or schematic. How can i do so? Instead of creating two cellviews, one for verilog and one for schematic (transistors).
 

You should use the hierarchy editor to configure which view you want to include in the simulation.
 

    aoshater

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