verification of a design...

Status
Not open for further replies.

sreenu236

Newbie level 6
Joined
Jan 4, 2007
Messages
11
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
hyderabad
Activity points
1,337
can any body please explain what is the verification of a design in vlsi.
In vlsi flow at what stage verification is happening.please suggest some books and material for this topic.
thanx in advance.
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…