Hi
VeriasHDL - Language-Independant Mixed-Signal Simulator
Simulating today's systems, whether implemented in silicon or on boards, requires a sophisticated mixed-signal simulator that handles different design descriptions at multiple levels of the design hierarchy. VeriasHDL® was designed by a team of engineers with more than 50 years of combined experience in mixed-signal, HDL-based simulation technology. The result is VeriasHDL, a new simulator built from the ground up to simulate any combination of mixed-signal HDL and SPICE descriptions
1. h**p://www.synopsys.com/products/avmrg/verias_hdl_ds.html
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