Most of your phase noise of interest, should be closer-in.
If you are using a spectrum analyzer resource then a lower
display bandwidth about center frequency and a high
resolution bandwidth should give you a useful picture
to extract info from.
Or, you might prefer to do time-domain samples, collect a
jitter distribution and use jitter - phase noise formulae
for the ATE (you might have to do some bench correlation to
satisfy yourself of its accuracy). The good thing about the
statistical, time domain approach is that you could post-filter
the data for crazy numbers before running the stats and figuring
the phase noise.
Do you have (say) a 5, 3 or 1MHz clock anywhere in the ATE
or on chip? 3rd and 5th harmonics are strong on digital signals,
I've seen chips have trouble with the 13th even (looking for
-120dB or so, every stinkin' repetitive digital signal is a threat).
At 15MHz you ought to be able to use chokes and caps to settle
down power supply noise. You could also break the power supply
feed and run the thing off batteries (a common thing when
making noise measurements) if you have a fortunate supply
voltage, or more batteries and a linear regulator if not. No
switching, no switching harmonics.