VCD File as a input to Cadence Virtuoso

[GalagaliPreeti]

Hello all,

I have vcd file now I want to feed it to the analog environment or say cadence virtuoso environment.How do I do it.

Thanks in advance

 

[pancho_hideboo]

I have vcd file now
I want to feed it to the analog environment or say cadence virtuoso environment.

It does not make sense at all.

Can you understand what Cadence Virtuoso is ?

What simulator do you use ?
Cadence NCSim ?

 

[ThisIsNotSam]

Hello all,

I have vcd file now I want to feed it to the analog environment or say cadence virtuoso environment.How do I do it.

Thanks in advance

VCD is the output of a simulation, not the input. I have no clue what you are trying to achieve.

 

[dick_freebird]

Well, here's an example.

I once had to design about 40Kgates of logic for what
was basically a SERDES, part of a spooky satellite fiber
optic bus. To get 400MHz chip scale clock in 0.5u CMOS
(and solve some space related issues) the existing
standard cell library had to be discarded (DFFs could
not even self-toggle at that speed, let alone with any
interstage logic) and all gates designed anew, and the
functional / timing info was provided by the customer
as vcd format files for the stimulus and the "expect"
vectors. I got them to produce me vcd single-bit files,
many of them, one per pin from their Mentor system.

Because of the timing challenges synthesis was impossible
and functionality was timing dependent; everything was
done "analog style" with Spectre and functionality /
timing closure was done with analog_extracted layout
view derived netlists (C-only).

I made veriloga "widgets" for driving and criticizing
pins. I made C-shell scripts initially to prepend header,
append footer, and massage the vcd "bit file". The
files produced ( by 'cat' of header, body, footer >xxx.va)
got slid under each pin's veriloga view (verilog.va). Had
to force a recompile each time, by touching each of the
"widgets".

Later on a guy came on to help and made scripts
in either Perl or Python (I forget) and that was a bit
faster executing.

We got it done. Probably the worst 3 years of my
design career. I'm never signing up for another "DX"
program. But that's nothing to do with the conversion
of vcd to Spectre-usable input stimuli and error-reporting.

Now there are, I believe, "stimulus editor" facilities and
it could be worth checking whether these include any
input / converter capability. But this is not my thing,
I only recall seeing mention of it.

 

[ThisIsNotSam]

Well, here's an example.

I once had to design about 40Kgates of logic for what
was basically a SERDES, part of a spooky satellite fiber
optic bus. To get 400MHz chip scale clock in 0.5u CMOS
(and solve some space related issues) the existing
standard cell library had to be discarded (DFFs could
not even self-toggle at that speed, let alone with any
interstage logic) and all gates designed anew, and the
functional / timing info was provided by the customer
as vcd format files for the stimulus and the "expect"
vectors. I got them to produce me vcd single-bit files,
many of them, one per pin from their Mentor system.

The funny part is that they probably had a testbench of sorts written in some known language. From there, it got converted to VCD and you "converted" it back to a simulation trace. Sigh.