Variable circuit based approach to adding jitter to PLL output.

[IBO]

hi all


Is there any variable circuit based approach to add jitter to PLL output.

thx

 

[rania_hassan]

Re: jitter

do you mean that you want to add a certain jitter to the PLL output ?
Rania

 

[mpig09]

Re: jitter

Dear IBO :

Do you want to design a spread spectrum clock ?

mpig

 

[moghtada]

jitter

you can add noise to the input of VCO in your PLL by a noise source. noise source spec is depended in your need.

moghtada

 

[DZC]

jitter

In my cadence develop environment there is a noise source model in library "ahdl",if you have such library you can simply use it for Spectre simulation.
Hope this will help!

 

[IBO]

Re: jitter

hi


@rania regarding ur question rania; yes i do mean doing that. Its an SWS graduation for a programmable spread spectrum clock.

@ mpig09 yes, a programmable one



thx
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[rania_hassan]

Re: jitter

Hi IBO,
What do you mean by SWS?
Rania

 

[IBO]

Re: jitter

@RANIA Si-Ware Systems (SWS) is a provider of analog/mixed-signal / RF design solutions and IP.

 

[rania_hassan]

Re: jitter

Hi IBO,
I just wanna make sure It's our SWS
I'm an SWS graduate too, I was in the first graduation project sponsored by SWS
anyway to make spread spectrum clock generator you can make in in different ways but the most common one is to make Fractional N PLL as you will modulate the division factor N
best regards,
Rania

 

[ICdog]

jitter

In power manager , Frequency jitter can make EMI lower . is this 'jitter' your say's?
best regards

 

[rania_hassan]

Re: jitter

Where are you IBO? & how is your SSC PLL?