hilal-t
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Hello guys,
I have problem in using sram as frame buffer
I have tried the following code but i got random pixel where I expect to get black screen with one red dot in the center.
I write on sram at sync. time
code for writing and reading from SRAM
I have problem in using sram as frame buffer
I have tried the following code but i got random pixel where I expect to get black screen with one red dot in the center.
I write on sram at sync. time
code for writing and reading from SRAM
Code:
// SRAM_control
reg [19:0] addr_reg;
reg weSRAM;
reg [15:0] data_reg;
assign SRAM_ADDR = addr_reg;
assign SRAM_DQ = (weSRAM)? 16'hzzzz : data_reg ;
assign SRAM_UB_N = 0;// hi byte select enabled
assign SRAM_LB_N = 0; // lo byte select enabled
assign SRAM_CE_N = 0; // chip is enabled
assign SRAM_WE_N = weSRAM; // write when ZERO
assign SRAM_OE_N = 0; //output enable is overidden by WE
assign mr={SRAM_DQ[15:12],6'b0};
assign mg={SRAM_DQ[11:8],6'b0};
assign mb={SRAM_DQ[7:4],6'b0};
wire reset;
assign reset=~KEY[0];
wire VGA_OK_TO_WRITE;
assign VGA_OK_TO_WRITE = (~VGA_VS | ~VGA_HS) & (~reset); //this will go high during blanking
always @(VGA_CTRL_CLK)
begin
if(reset)
begin
addr_reg<={Coord_X[9:0],Coord_Y[9:0]};
weSRAM <= 1'b0;
data_reg <= 16'b00000000000000000;
ledd<=1'b1;
end
else begin
if (VGA_OK_TO_WRITE) begin
addr_reg={10'd3240,10'd240};
lock<=1'b1;
data_reg <= 16'b1111000000000000;
weSRAM <= 1'b0;
ledd<=1'b0;
end
else if (~ VGA_OK_TO_WRITE)
begin
weSRAM <= 1'b1;
addr_reg<={Coord_X[9:0],Coord_Y[9:0]};
lock<=1'b0;
end
end
end
VGA_Ctrl u1 ( // Host Side
.iRed(mr),
.iGreen(mg),
.iBlue(mb),
.oCurrent_X(Coord_X),
.oCurrent_Y(Coord_Y),
.oAddress(),
.oRequest(SDRAM_READ_LOGIC),
// VGA Side
.oVGA_R(oVGA_R),
.oVGA_G(oVGA_G),
.oVGA_B(oVGA_B),
.oVGA_HS(VGA_HS),
.oVGA_VS(VGA_VS),
.oVGA_SYNC(VGA_SYNC_N),
.oVGA_BLANK(VGA_BLANK_N),
.oVGA_CLOCK(VGA_CLK),
// Control Signal
.iCLK(VGA_CTRL_CLK),
.iRST_N(DLY_RST_2) );