using PWM as a DAC for audio output

Hi everyone, I'm going to realize an audio player with a PIC32, using PWM as a DAC for audio output.
I have not write any code yet, because I want to understand deeply the theory behind it.
I stored a .WAV file, 44.1 Khz sample rate, 16 bit, in a SD card, in a previous part of code. Now i want to reproduce this audio trought PWM. Because I use mikroC, I looked at PWM library, but there isn't trace about the sample that I want to reproduce; then I think I'm missing something.
Can you help me?
Thank you.

To achieve 16 bit resolution with 44 kHz sampling rate using regular PWM, you would need about 3 GHz pwm clock. That's obviously not feasible.

Some kind of sigma-delta modulation is necessary.

Thank you for reply. Just my curiosity, what kind of equation did you use for obtain the 3 Ghz value?
So finally I think i will use a external DAC.

The pulse width for each sample must be varied in 2^16 steps
fpwm=44.1k*2^16

So let's me say what I understand, and tell me if it is correct. I have 16 bit, so for each sample I have a time window of 1/2^16. Each sample is expressed by a variation of duty cicle of the pulse in this time window; for example if all bits are 1, the duty cicly is 100%, for all bits are 0, the duty cicle is 0%. Whatever is the value, each sample have a fixed time window of 1/2^16, so a frequency of 65535. In one second I want 44.1k samples, so the total frequency is 65535*44.1k=2,88 Ghz.
It is correct?

That's my calculation.

As already mentioned, modern DACs are taking a different approach to achieve high resolution with moderate switching frequency. A basic single-bit sigma-delta DAC outputs a binary sequence in low MHz range that can represent the analog signal much more accurate than a pwm signal.

Thats not correct calculation. Each sample should be integrated from at least of 10 PWM cycles. So, we are talking about 30GHz PWM frequency. :laugh:

I'm thinking about it and I'm a bit confuse. In particular I don't understand why each bit of sample needs a PWM cycle. I agree with Easyrider83, 10 cycles for a samples is necessary for obtain a correct average value. But I still don't understand why each bit needs a PWM cycle.
Suppose I want an analog value of an half of logical swing. The 16 bit digital value is one 1 followed by fifteen 0. If I have a PWM frequency of 44.1Kh*10, 441 Khz, I have a time window of 1/441KHz, about 2.2 us. In this 2.2 us I have a PWM pulse with 50% duty cicle. Then, in 1 "wave sound cycle", made by 22 us (1/44 Khz), I have 10 PWM pulse with 50% duty cicle, that outputs an average analog value of 50% of the voltage value of logic 1; for example if logic 1 is 5 V, the output should be 2.5 V.
Why this example shouldn't work?

Thats not correct calculation. Each sample should be integrated from at least of 10 PWM cycles. So, we are talking about 30GHz PWM frequency.

Click to expand...

It's of limited sense to calculate a method that can't be practically implemented. You have to specify the reconstruction filter. But using 44 kHz PWM cycle isn't worse than a DAC with 44 kHz sampling rate.