dw_man
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I am trying to create an I/O assignment file to define the locations of my I/O pads. I don't have any PADs defined yet so I understand I should do this at RTL level in a top-level file.
My question is how do I know what cells to instantiate in my VHDL file? Do I use one of the PADs from the IO lef file, if so which ones? I have already defined the power/ground/corner pads, I just need the regular I/O pads. In my lef file I have macros such DI_P, DI_G, DI_BTB_G.
My question is how do I know what cells to instantiate in my VHDL file? Do I use one of the PADs from the IO lef file, if so which ones? I have already defined the power/ground/corner pads, I just need the regular I/O pads. In my lef file I have macros such DI_P, DI_G, DI_BTB_G.