using hamming code for correcting the 12 bit input

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module fixer (main_data,number,fixed_data,clk);
input [12:1] main_data;
input clk ;
input [3:0] number;
output [12:1] fixed_data;
reg [12:1]r ;
reg [3:0] n ;
 
reg stop = 1'b1 ;
always @ ( posedge clk )
begin
if ( number != n) 
stop<=1;
 
 
 
if (stop)
begin 
r<=main_data;
n<= number ;
 
case (number)
4'b0001 : begin r[1]<=(~r[1]); stop<=0; end 
4'b0010 : begin r[2]<=(~r[2]); stop<=0;end 
4'b0011 : begin r[3]<=(~r[3]); stop<=0;end 
4'b0100 :begin r[4]<=(~r[4]); stop<=0;end 
4'b0101 :begin r[5]<=(~r[5]);stop<=0;end 
4'b0110 :begin r[6]<=(~r[6]);stop<=0;end 
4'b0111 :begin r[7]<=(~r[7]);stop<=0;end 
4'b1000 :begin r[8]<=(~r[8]);stop<=0;end 
4'b1001 :begin r[9]<=(~r[9]);stop<=0;end 
4'b1010 :begin r[10]<=(~r[10]);stop<=0;end 
4'b1011 :begin r[11]<=(~r[11]);stop<=0;end 
4'b1100 :begin r[12]<=(~r[12]); stop<=0; end 
endcase
 
end 
 
end  
assign fixed_data=r;
endmodule

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module fixer (
  input      [12:1] main_data,
  input             clk ,
  input      [3:0]  number,
  output reg [12:1] fixed_data
);
 
  always @ ( posedge clk ) begin
    fixed_data <= main_data;
    fixed_data[number] <= ~main_data[number];
  end  
 
endmodule