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The physical layer refers to LVDS spec IEEE1596.3, which uses DC coupling by default. However as mentioned in the Cisco document
The basis of the LVDS and termination scheme can be found in IEEE1596.3-1996. Some parameters have been modified to accommodate the 1.25Gb/s requirements. SGMII consists of the most lenient DC parameters between the general purpose and reduced range LVDS. Both the data and clock signals are DC balanced; therefore, implementations that meet the AC parameters but fail to meet the DC parameters may be AC coupled.
In contrast to SGMII, which declares AC coupling optional, PCIe specifies strictly
4.3.5.1. Channel AC Coupling Capacitors
Each Lane of a PCI Express Link must be AC coupled. The minimum and maximum values for the capacitance is given in Table 4-10. Capacitors must be placed on the transmitter side of an interface that permits adapters to be plugged and unplugged. In a topology where everything is located on a 5 single substrate, the capacitors may be located anywhere along the channel. External capacitors are assumed because the values required are too large to feasibly construct on-chip.
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