I'm using the Altera Nios Developement Board, with the Apex20K200E FPGA onboard, for SoC design implementations.
Can anyone confirm that for the 3.3V proto-card pins to be used as IO pins for data transfer/input-output, one has to enable the card by connecting a GND supply to pin_V6 in the Apex20K200E device. This pin, as I have discovered, is to enable use of 3.3V proto pins.
Has anybody else faced the same design challenge...?