useful: help to analysize this circuit

Status
Not open for further replies.
W

wonbef

Full Member level 3
Joined
Oct 13, 2004
Messages
188
Helped
8
Reputation
16
Reaction score
6
Trophy points
1,298
Location
Nanshan, Shenzhen
Activity points
1,083
hi, all,
this is a chopper-stabilized amplifier. it is a low-offset, low-noise amplifier, used in high precision applications.

pls help to analysize the nulling principle of this amplifier and the key design technology! thanks in advance.

the schematic is:


Added after 5 hours 26 minutes:

this circuits is similiar with ICL7650. CA and CB (about 100nF) is external nulling capacitor.
 

when i simulate this amplifier (close loop with the gain of 100), i find it can't null the offset. why? this circuit is wrong? is it related with process model (i use 3-um metal-gate process)?...
pls help to analysize this circuit. manythanks.


regards,
 

there should be one nulling amp & main amp as shown in ICL7650,
I got 2 question about this ckt.
1. but ur amp on the left side (nulling amp ?) has un-balance differential pair, this amp have problem.
2. the CA & CB connect to the substrate of NMOS in the next amp (main amp ?),
do u use 3-well process ? or how can you change the substrate of NMOS in morden CMOS process.
 

1. the inverter input of nulling amp and the non-inverter input of main amp merged into one in order to reduce noise;

2. CA nad CB is external nuling capacitor, and connect to the substrate of NMOS (it is back-gate connection);

i simulate this amplifier (close loop), i find it can't auto zero. why? i don't know.

regards,
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…