Hi,
I want to make the layout of a non-overlapping clock generator. In that circuit i am using two delay elements each of which is a cascade of even number of slow inverters having small aspect ratios(20 inverters in series). Can i use common centroid or some another layout techniques while making layout of the delay elements?
thanks in advance
nishanth
I would not do the layout in common centroid or using other different layout technique. I would just draw each branch (CLK1, and CLK2) similar in order to help the achieving of nearly 50% duty.