May 22, 2011 #1 A ajesh.nitc Newbie level 2 Joined May 21, 2011 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,292 I have a doubt. Can an and gate be used in clock gating cell instead of flip flop..
May 22, 2011 #2 M manajel1 Junior Member level 2 Joined Apr 22, 2011 Messages 20 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,393 yeah possible this is the latch-free mode in clock-gating. it s has the probleme of gliching in the enable signal, i recommand u to use the latch-based mode (using a latch's flip flop)
yeah possible this is the latch-free mode in clock-gating. it s has the probleme of gliching in the enable signal, i recommand u to use the latch-based mode (using a latch's flip flop)