grittinjames
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I am currently addressing a 128Mbit flash using 24 address lines, 8 data lines, and 1 chip select line (the processor has 2 chip selects).
What does the external logic look if I want to use a second chip select line to create a high address line? I want to use a 256Mbit flash.
I tried it and facing some issue, Some one have any clue?
It will be a real help if you suggest an idea to solve the problem
What does the external logic look if I want to use a second chip select line to create a high address line? I want to use a 256Mbit flash.
I tried it and facing some issue, Some one have any clue?
It will be a real help if you suggest an idea to solve the problem