USB2514B usb hub controller schematic basic questions

So i am changing the usb hub controller in my project to a Microchip USB2514B since it was the 2nd cheapest on Farnell that fits my requirements and has great extra features i might want to implement like a custom configuration via I2C EEPROM.

Link: https://export.farnell.com/microchip/usb2514b-m2/usb-hub-controller-usb2-0-sqfn/dp/2775060
Datasheet: https://www.farnell.com/datasheets/2032129.pdf

I've prepared this basic schematic so far that should (in theory if i didn't mess up) work as a basic usb 1 to 4 port hub powered by the upstream removable usb port.



- Upsteam and downstream ports are connected to their appropriate ports
- Ground is marked as EP in the schematic block, pin 37 which is the middle square of the QFN package and connected via multiple vias as the datasheet says
- VDD33/VDDA33 is powered by a 3.3V LDO voltage regulator supplied by 5V VCC (not shown)
- Configuration pins 24 and 25 are configured via a switch/jumper to either Default configuration with bus-powered operation or configuration via I2C EEPROM as shown in page 19
- VBUS Detection pin 27 is set via a voltage divider as the datasheet mentions. Not sure if it can be left floating
- The datasheet says there is internal 24Mhz clock. Generally you should always use a crystal as i have done in the schematic as it is more stable, but there is no mention on how to use the internal clock. Should XTALIN and XTALOUT be connected together to use the internal clock if needed? In other ICs from my experience you usually had to ground one or both of these pins to use the internal clock
- RBIAS pin 35 is mentioned in the datasheet: "USB Transceiver Bias: a 12.0 kohms (+/- 1%) resistor is attached from ground to this pin to set the transceiver’s internal bias settings." I am not sure what this does and if it is actually needed
- Other pins left unconnected. RESET_N could be useful but i don't see how to implement it since i can just power off. PLLFILT is for a PLL Regulator Filter Capacitor and CRFILT is for a VDD Core Regulator Filter Capacitor but datasheet says they are not required.

So do you see any issues? Kind regards

Looks OK to me but I would be inclined to pull the RESET_N pin high and possibly add a timing capacitor to ground. Several internal functions are enabled as RESET_N is de-asserted and the data sheet doesn't specify whether they assume default condition at power-up or not.

Brian.

betwixt said:

Looks OK to me but I would be inclined to pull the RESET_N pin high and possibly add a timing capacitor to ground. Several internal functions are enabled as RESET_N is de-asserted and the data sheet doesn't specify whether they assume default condition at power-up or not.

Brian.

Click to expand...

Yes the datasheet is not clear but in the reset section it states:
"The hub experiences the following two resets:
• Hardware reset via the RESET_N pin
• USB bus reset"

So technically power-on acts like a hardware reset. So pulling it high instead of leaving it floating should be ok. I'll probably test it on a qfn prototyping board first though.

How about the internal crystal driver, what's the way to use that if you wanted to?

Where do you read about internal clock? The supported clock options are external crystal (using the internal oscillator circuit) or external oscillator.

FvM said:

Where do you read about internal clock? The supported clock options are external crystal (using the internal oscillator circuit) or external oscillator.

Click to expand...

First page it says:
• Onboard 24 MHz crystal driver or external 24 MHz clock input

Unless by onboard they mean on the pcb not internal;p

"On-board crystal driver" refers to the circuit driving an external crystal, the post #1 schematic shows how to use it.