Aug 30, 2003 #1 C CaiBo Newbie level 1 Joined Jul 27, 2003 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 7 Hi, ALL If anybody has USB1.1 Hub Verilog or VHDL model, can you please share with me. I need it for study. Thanks!. Best regards.
Hi, ALL If anybody has USB1.1 Hub Verilog or VHDL model, can you please share with me. I need it for study. Thanks!. Best regards.
Sep 10, 2003 #2 samsuffy Member level 4 Joined Jul 23, 2002 Messages 75 Helped 2 Reputation 4 Reaction score 2 Trophy points 1,288 Activity points 534 it may help you **broken link removed**
Sep 10, 2003 #3 P petarpav Full Member level 5 Joined Mar 25, 2002 Messages 299 Helped 13 Reputation 26 Reaction score 5 Trophy points 1,298 Activity points 2,172 look at: www.opencores.org/projects/
Sep 10, 2003 #4 J Jayson Full Member level 4 Joined Oct 8, 2001 Messages 234 Helped 14 Reputation 28 Reaction score 5 Trophy points 1,298 Location Brazil Activity points 2,448 While we're on the topic of cores... Does anyone have any tutorials on what to do right after you have a core? How do you connect them and use them inside say Xilinx ISE, etc? Can they be intergrated as peripherals for an processor like the Xilinx Microblaze, or Altera Nios processor? - Jayson
While we're on the topic of cores... Does anyone have any tutorials on what to do right after you have a core? How do you connect them and use them inside say Xilinx ISE, etc? Can they be intergrated as peripherals for an processor like the Xilinx Microblaze, or Altera Nios processor? - Jayson