USB Softcore for FPGA

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Have anyone used **broken link removed** before ?

why do we need extra resistance on the tx pin ONLY ?

Whichever pins you transmit on need to have resistors after them. The exact values will depend on the internal resistance of the pins; usually something around 27 ohms will be ok.
Click to expand...
 

Sounds like you need to review the USB spec for required driver impedance.
 

According to section 7.1.1 (Tx) and 7.1.2 (Rx) of **broken link removed** , it seems like we need some resistance for impedance matching for BOTH Tx and Rx.
 

You have been apparently confused by the USB 2.0 spec describing both FS and HS requirements. It's easier to review usb11 spec. For FS as targeted by the FPGA project, the effective driver impedance is 28 to 44 ohm (internal driver impedance + series resistor). There's no receiver termination (except for kohm resistors used for device identification.

The correct GitHub link is https://github.com/avakar/usbcorev, by the way.
 
You want to review the USB spec about the usage of differential and single-ended signalling and how it's implemented in driver hardware.
 
ok.

You also need to pull the D+ line up to 3.3V via a 1.5k resistor. You can pull it directly, or via a pin on your FPGA, if you want to dynamically attach/detach to the bus.
Click to expand...

What about D- line ?
 

Hi,

What about D- line ?
Click to expand...
The USB spec will tell you.

I assume it's impossible to tell you all in a forum thread that is written in the USB spec.
I see no way around reading documentation...

Klaus
 

I found answer for D-line



- - - Updated - - -

https://github.com/avakar/usbcorev/blob/master/usb.v#L1-L29 this is way too many driver signals ... You have any suggestions ?

Code Verilog - [expand]
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module usb(
    input rst_n,
    input clk_48,
 
    input rx_j,
    input rx_se0,
 
    output tx_en,
    output tx_j,
    output tx_se0,
 
    input[6:0] usb_address,
 
    output usb_rst,
 
    output reg transaction_active,
    output reg[3:0] endpoint,
    output reg direction_in,
    output reg setup,
    input data_toggle,
 
    input[1:0] handshake,
    
    output reg[7:0] data_out,
    input[7:0] data_in,
    input data_in_valid,
    output reg data_strobe,
    output reg success
    );
 
Last edited:

It looks like 4 pins are used with 2 pins connected to each USB data line. This allows the data lines to be treated as two single ended lines, or one differential pair. Either the single ended drivers are Tristated or the differential or both.
 

is it correct that I only need TWO 27 ohm resistors in series (to compensate the low output impedance, say 73 ohm of FPGA pins) with the FPGA usbcorev softcore D+ and D- pins ?

And another 1.5 kilo-ohm pull-up resistor for D+ line ?

From https://www.intel.cn/content/dam/al...terature/hb/cyclone-iv/cyiv-5v1-02.pdf#page=9 (have anyone used on chip termination ?) , I am not sure if I need to use external series termination resistors for both D+ and D- line

Could anyone advise ?

- - - Updated - - -

When I loop deeper into cyclone IV IO spec, it only supports 25 ohm or 50 ohm on-chip termination.

This means this on-chip termination is not suffice for 90 ohm transmission line in USB spec
 

With Intel FPGA, there's no calibrated series termination that matches the USB FS requirement of 28 - 44 ohm driver impedance. You are probably able to achieve the impedance by choosing a suitable drive strength in uncalibrated mode, but the impedance will be subjected to type and temperature variation. Thus it's probably better to use a low driver impedance along with series resistors.

Pull-up and -down resistors need to be implemented discretely in case of doubt, but can be switched by tri-state outputs.
 
USB FS requirement of 28 - 44 ohm driver impedance
Click to expand...

I suppose it should be 90 ohm instead ?? See figure 7-20 of the USB 2.0 spec which I had also posted as screenshot in the previous post.

Pull-up and -down resistors need to be implemented discretely in case of doubt, but can be switched by tri-state outputs.
Click to expand...

Since D+ and D- are bi-directional, do we need 15 kilo-ohm pull-down resistors for both D+ and D- line at FPGA pins ??

What do you mean by "can be switched by tri-state outputs" ?
 

90 ohm is the nominal differential cable impedance, 22 - 44 om is the specified single ended driver impedance. It's all explained in the USB spec.

I'm not sure what pull-up and down resistors have to do with bidirectional operation. Different resistor values shall be implemented for down- and up-stream ports, as shown in your post #10. I was suggesting tri-state drivers in case you want to switch resistors, e.g. to signal activation/deactivation of an upstream (device) port or change speed. Otherwise you can use fixed resistor.
 
Hi,

Since D+ and D- are bi-directional, do we need 15 kilo-ohm pull-down resistors for both D+ and D- line at FPGA pins ??
Click to expand...

Look at the picture of post #10.
Left side: is the HOST or HUB side
Right side: is the DEVICE side.

15kOhms pulldown are only at the HOST or HUB side.

But I assume (did you write it somewhere?) you want to design an USB_DEVICE.
Is this correct?
If so, then focus on the right side pcitures.

Klaus
 
Hi,

Wow...

If you don´t know whether you need to design a HUB, HOST or DEVICE ... nobody else can know.

Klaus
 
@KlausST

I got it now. Since my FPGA code is not capable of running linux yet, so usbcorev softcore is going to be a DEVICE only for now
 

Hi,

it my eyes it has nothing to do with an operating system (LINUX)

Let´s try another terminology (not usual USB_Specification)

Do you want to build a
* USB-Master
* or a USB-Slave?

Klaus
 

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