engr_joni_ee
Advanced Member level 3
I'm curious about the physical layer signals for USB on an FR4 PCB.
For USB 2.0 operating at 480 Mbps, the data pins (D+ and D-) form a differential pair. With double data rate (DDR) or sampling on both edges, this translates to a differential signal with a clock frequency of 240 MHz. Because there is only one differential pair for data in USB 2.0, it look like that USB 2.0 is not duplex, right ?
The USB 3.0 has two additional differential pairs one is SSTX +/- and the other is SSRX +/-. These two additional differential pairs are also called supper speed differential pairs. The USB 3.0 is operating at 5.0 Gbps. I am wondering about the physical layer signals for USB 3.0.
This means that in total there are three differential pairs for data in USB 3.0.
D+ and D- operating at 480 Mbps
SSTX+ and SSTX- operating at ___________ ?
SSRX+ and SSRX- operating at ___________ ?
What is the clock frequency or pulse frequency of these two additional differential pairs in USB 3.0 ?
For USB 2.0 operating at 480 Mbps, the data pins (D+ and D-) form a differential pair. With double data rate (DDR) or sampling on both edges, this translates to a differential signal with a clock frequency of 240 MHz. Because there is only one differential pair for data in USB 2.0, it look like that USB 2.0 is not duplex, right ?
The USB 3.0 has two additional differential pairs one is SSTX +/- and the other is SSRX +/-. These two additional differential pairs are also called supper speed differential pairs. The USB 3.0 is operating at 5.0 Gbps. I am wondering about the physical layer signals for USB 3.0.
This means that in total there are three differential pairs for data in USB 3.0.
D+ and D- operating at 480 Mbps
SSTX+ and SSTX- operating at ___________ ?
SSRX+ and SSRX- operating at ___________ ?
What is the clock frequency or pulse frequency of these two additional differential pairs in USB 3.0 ?