[Urgent] PLL power supply Variation

[AdvaRes]

Hi all,

I used an ideal power supply (constant= Vdd) to simulate a PLL. Now I wanna simulate it again but with a non ideal source. I used the vsin source from the analoglib (I put it in serie with the Vdc source) in order to make power supply oscillate around the idea Value Vdd. Actually I have no Idea how much I have to set the amplitude of the sin voltage. I have no idea how much is this amount of the fluctuation if compared to Vdd. Has it to be Vdd/10, Vdd/ 100 ?
Please Help.

 

[rancohen_2000]

Hi AdvaRes,

there isn't short answer for that.
you will need to know the power supply parameters like:
RMS noise, ptp noise, switched or LDO, is switched at what frequency and what is the output capacitor and Inductor.

if it's LDO then it is more simple, for example if you will use LDO of Linear LT1764 then you should had Sin of 10mV. but don't forget the RMS noise!

if it is Switched then you will need to calculate the output noise ripple using the power supply datasheet formulas. for example as LTC3611 page 14.

Ran

 

[AdvaRes]

Hi AdvaRes,

there isn't short answer for that.
you will need to know the power supply parameters like:
RMS noise, ptp noise, switched or LDO, is switched at what frequency and what is the output capacitor and Inductor.

if it's LDO then it is more simple, for example if you will use LDO of Linear LT1764 then you should had Sin of 10mV. but don't forget the RMS noise!

if it is Switched then you will need to calculate the output noise ripple using the power supply datasheet formulas. for example as LTC3611 page 14.

Ran

Hi,

Actually I find 10 mV for a 1.1 Vdd a lot and it can even be seen without zooming.
Are you sure about the sin amplitude ?

 

[rancohen_2000]

is is depand on your input voltage to your LDO.
see page 4 at LT1764 datasheet.

http://cds.linear.com/docs/Datasheet/1764afb.pdf

lookfor line regulation,Ripple Rejection and output voltage noise