Feb 23, 2019 #1 S shaiko Advanced Member level 5 Joined Aug 20, 2011 Messages 2,644 Helped 303 Reputation 608 Reaction score 297 Trophy points 1,363 Activity points 18,302 Hello, What does the VHDL '|' (like bitwise or in C) operator do ?
Feb 23, 2019 #2 T TrickyDicky Advanced Member level 7 Joined Jun 7, 2010 Messages 7,110 Helped 2,081 Reputation 4,181 Reaction score 2,048 Trophy points 1,393 Activity points 39,769 Its not an operator. It allows you to select multiple cases with case or with..select statements: Code VHDL - [expand]1 2 3 4 5 6 7 8 9 10 signal a : integer; .... case a is when 0 => when 1 to 14 => when 15 | 20 | 25 => when others => end case;
Its not an operator. It allows you to select multiple cases with case or with..select statements: Code VHDL - [expand]1 2 3 4 5 6 7 8 9 10 signal a : integer; .... case a is when 0 => when 1 to 14 => when 15 | 20 | 25 => when others => end case;