Hi,
IC Fabrication requires use of pre-designed, tested and characterized set of gate designs. EDA tools convert our design to an implementable form by interconnecting the gate designs provided by the Fab. For e.g FAB1 may have 4 input OR (OR4) gate whereas FAB2 may not have a 4 input OR. If you are using FAB-2 library, the design tool will not use OR4. There are many more parameters like drive strength, Fan-in, Fan-out, e.t.c. which are crucial when selecting the gate. Each library element essentially contains Inputs/Outputs, Fan-in, Fan-out, delay, Cell Layout, parasitic R & C, e.t.c... Since cell characterization is required, the FABs have to roll out the libraries for each node.
So We give our design, tell the tool which library (collection of cells which we are using) to use and the tool does the selection. So if you are planning to give to FAB, be careful while selecting the libraries. If not, just glance through the library and understand many things.