Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Understanding Microarchitecture of legacy IPs

Status
Not open for further replies.

curious_mind

Full Member level 4
Full Member level 4
Joined
Apr 14, 2019
Messages
212
Helped
0
Reputation
0
Reaction score
3
Trophy points
18
Activity points
1,603
I was going through the website https://github.com/TobiFlex/TG68K.C, which claims to have implemented 68000, 68010 and 68020.
I was interested to know the details of its micro architecture. Can anybody guide how to do so?
 

I searched the phrase "68000, 68010 and 68020 micro-architecture" and got a few links where further info is available. In one of them you need to sign up to obtain a free e-book on the 68K.
Did you try out such links?
 


I already have this book 68000,68010 and 68020 primer. This book covers assembly programming in detail. I am actually looking for microarchitecture, Viz. design of controller and the datapath.
 

A much simpler example is the 6502, and there are some good guides to the architecture. A number of years ago I used this to build a 6502 into an ASIC, back before everything had ARMs. Worked great, if you don't mind 8-bit math.

**broken link removed**
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top