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[SOLVED] Unable to elaborate on the design_it gives error

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amiramu10

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Hi,
I am trying to synthesize a simple counter using genus (cadence) tool. I am using Lfoundry PDK library and importing the library. But when I am elaboraing the design it says, "Could not find an HDL design. [CDFG-210] [elaborate]. The design is UD_counter.v". The name of my file is UD_counter.v. Befpre elaboration I have read the file using read_hdl command providing the correct path. It was compiled without any error. My code of counter is very simple
I would highly apprciate any help.

Code:
module counter(clk,reset,up_down,load,data,count);
  //define input and output ports
  input clk,reset,load,up_down;
  input [7:0] data;
  output reg [7:0] count;
  //always block will be executed at each and every positive edge of the clock
  always@(posedge clk)
  begin
    if(reset)    //Set Counter to Zero
      count <= 0;
    else if(load)    //load the counter with data value
      count <= data;
    else if(up_down)        //count up
      count <= count + 1;
    else            //count down
      count <= count - 1;
  end
endmodule :counter

[moderator action: added CODE tags]
 
Last edited by a moderator:

Thanks a lot for your response. I used elaborate UD_counter. You got it right. Error was in name.
Just now, I came to know that name of the file and name of the top module should be same. I tried changing name of the file and it worked.
Thanks again
 

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