Rickooo
Member level 3
Hi, I am ussing PIC18F4520 microcontroller. I want to display circuit information using UART RS232. I am using PIC development board which have inbuilt connection to Rx Tx pin of UARt to C6 and C7 pin of controller. I am using HyperTerminal to display the read. XTAL = 16M, baudrate is 9600
When I am using UART_Write_Text function, it display random character.
Config :
Here is the code:
When I am using UART_Write_Text function, it display random character.
Config :
Code:
// CONFIG1H
#pragma config OSC = HS // Oscillator Selection bits (HS oscillator)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = ON // Brown-out Reset Enable bits (Brown-out Reset enabled and controlled by software (SBOREN is enabled))
#pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting)
// CONFIG2H
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)
Here is the code:
Code:
#ifndef _XTAL_FREQ
#define _XTAL_FREQ 16000000UL
#endif
#include <xc.h>
#include "uart.h"
char UART_Init(const long int baudrate)
{
unsigned int x;
x = (_XTAL_FREQ - baudrate*64)/(baudrate*64);
if(x>255)
{
x = (_XTAL_FREQ - baudrate*16)/(baudrate*16);
TXSTAbits.BRGH =1 ;
}
if(x<256)
{
SPBRG = x;
TXSTAbits.SYNC = 0; //Asynchronous
RCSTAbits.SPEN = 1;
//**Select 8-bit mode**//
TXSTAbits.TX9 = 0; // 8-bit reception selected
RCSTAbits.RX9 = 0; // 8-bit reception mode selected
RCSTAbits.CREN = 1;
TXSTAbits.TXEN = 1;
TRISCbits.TRISC7 = 1;
TRISCbits.TRISC6 = 1;
INTCONbits.GIE = 1;
INTCONbits.PEIE = 1;
return 1;
}
return 0;
}
char UART_TX_Empty()
{
return TXSTAbits.TRMT;
}
char UART_Data_Ready()
{
return PIR1bits.RCIF;
}
char UART_Read_Char()
{
while (!PIR1bits.RCIF) ; // wait for data receive
if(RCSTAbits.OERR) // check for Error
{
RCSTAbits.CREN = 0; //If error -> Reset
RCSTAbits.CREN =1 ; //If error -> Reset
}
//while(!PIR1bits.RCIF);
return RCREG;
}
void UART_Read_Text(char *Output, unsigned int length)
{
unsigned int i;
for(int i=0;i<length;i++)
Output[i] = UART_Read_Char();
}
void UART_Write_Char (char data)
{
while(!PIR1bits.TXIF);
//while (TXSTAbits.TRMT == 0)
TXREG = data;
}
void UART_Write_Text(char *text)
{
while(*text)
UART_Write_Char(*text++);
}