typical values of Capacitors of BitLine and Bitline-Bar in an SRAM cell

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Hi
What are the typical values of Capacitors of BitLine and Bitline Bar in a 6T conventional SRAM cell in 16nm PTM?
thanks
 

Extract/calculate/estimate the in-cell capacitance of the bit-lines incl. their row-to-row length, add the input capacitance of the wordline switches, multiply by the no. of rows, then add the I/O capacitances of sense and force bitline switches as well as the output capacitance of the precharge transistor(s).

If you can't extract from an available layout, calculate/estimate from the connection lengths. Interconnect capacitances don't scale down so much with technology nodes - s. e.g. the **broken link removed**.

For the 15nm process you can calculate with approximate values of 0.16fF/µm for M1 wires and about 0.13fF/µm for M2 wires (includes area and fringe capacitance).
 
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