Type of transistor amplifier?

[asrock70]

What class amplifier that is?

 

[FvM]

The schematic doesn't tell, can be class A or C, depending on the transistor bias. More likely class C.

 

[asrock70]

OK her is full amplifier chain

 

[schmitt trigger]

The terribly drawn transistor symbol appears to be a JFET.
If so, it could operate class "A" for very minute signals, i.e. as long as the gate-source junction doesn't become forward biased.

For proper biasing: The circuit requires a source resistor bypassed with a capacitor to obtain self-bias.

 

[asrock70]

Symbol is FET transistor and in real is used MOSFET .
In the last stage used IXYS RF megahertz Switching transistor for 12A
Amplifier if PA with output power about 100W.
On left side is TTL 5V squre
central side is poweret on 20V and last stage is powered on 40V
I thing it is class F amplifier, but I do not understand output stage of last transistor
I'm just confused as a white (gold) dog Goro

 

[FvM]

For proper biasing: The circuit requires a source resistor bypassed with a capacitor to obtain self-bias.

The simplified schematic doesn't show the input bias, I assume there can be a DC offset if required. If so, it doesn't really matter if the FET is enhancement or depletion mode type, the bias polarity and level can be adjusted according to intended operation mode. It could be even class F rather than C with a very small duty cycle.

Source resistor self-bias, although basically possible, will be rarely used for RF PA at higher frequency and power.

- - - Updated - - -

Didn't yet notice the second schematic. The driver stage does enforce roughly 50% duty cycle for the output stage due to LC resonance, so operation is class C.

I think we can stop the discussion at this point. You can either calculate/simulate the waveforms exactly using complete circuit parameters, or confine yourself to say it's class C.

 

[asrock70]

Her is simple simulation with real parameters but only in Multisim, not in RF similation tools as ADS.
Red is input TTL on left side and green is signal on gate last MOSFET transistor div is 20V
Corresponds it to class C?
If so, what are the L C circuits in output stage?
LPF?

 

[Audioguru]

The LC circuits are a lowpass filter so that the output is almost a sinewave with low harmonics instead of a squarewave that has lots of harmonics that cause interference.
The Mosfets operate in class-C since they are completely turned off for half of the waveforms.

 

[asrock70]

OK if LC circiut on output is LPF I have any question.
For clarity new picture.


1. Why in the filter missing capacitor between C4 and L3, illustratively drawn in red ?
Real value in LPF not quite fit me with assumptions.
2. What is the source impedance for this LPF?
I thing source impedance is Inductance RF2 + Capacitance Xc4 + serial resistance C4, C4 is in real 2pcs 100nF || and Xc4 is very small and real source impedance is = Xrf2. It is true ?
If yes and I use real value of LC have filter this characteristic

Yellow line is simulation real value and blue supposed
-6dB on 20MHz is for PA with about 100W unthinkable I think.

 

[FvM]

1. Why in the filter missing capacitor between C4 and L3, illustratively drawn in red ?
Real value in LPF not quite fit me with assumptions.

It's not so that class C matching networks are generally omitting this capacitor, but it may appropriate under circumstances.

Quite obviously your assumptions are wrong. This is no linear circuit, you can't simply determine a source impedance of a class C PA. For an exact analysis, you either go to time domain or apply methods like harmonic balance which derive an effective impedance at each harmonic for a given operation point.

I thing source impedance is Inductance RF2 + Capacitance Xc4 + serial resistance C4

How do you determine "RF2"?

 

[carpenter]

Her is example how design C amplifier

- - - Updated - - -

L3+C3 is output matching and transfor impedance Rl to impledance LPF
LPF is L2+C2+L1+C1
see page 14

 

[asrock70]

Thanks very much for this link
many things I understood it.
But I have any question still
1. C1 and C2 (green sharp) is not it a mistake? if I calculate C1 for output machj and add LPF with calculatec C2 anf if C1 is || with C2 have new capacitor with new capacitance c=c1 || c2where is different form calculated value for outout match an too for LPC. I thing her mus be uset LPF where have on first position only L. Am I right?
2. Voltage rating and type of DC blocking capacitor (orange sharp}. Is good choice for 30m frequency and 30W Power SMD ceramic NP0 100nF and voltage rating 4x Vdd?
3.Parasitic suppression capacitor (yellow sharp).In many design this part is is not fitted Why?

 

[FvM]

I think here must be used LPF where have on first position only L. Am I right?

No. Both networks are designed for 50 Ohms interface impedance. The can be connected without changing them. Of course C1 and C2 can be combined into one capacitor.

Is good choice for 30m frequency and 30W Power SMD ceramic NP0 100nF and voltage rating 4x Vdd?

100nF NP0 isn't feasible. No problem to use X7R, but need to check current rating related to ESR.

 

[asrock70]

No. Both networks are designed for 50 Ohms interface impedance. The can be connected without changing them. Of course C1 and C2 can be combined into one capacitor.

Then, but you do not know what the scheme LPF filter order goes.
If C1+C2 is replaced one pieces or all C is composed of more and I look on schematic without red dot line I see
first L and C1 maybe C2 is output match and all other is LPF 6th order
or
output math is only firs L + C1 and all other is LPF 7th order.
LPF maybe syntheses with L or C on first position from left.

Why do I deal
I'm here amplifier and trying to understand its output networks.
Unfortunately I know the output impedance of the amplifier
and the whole thing is complicated, that the amplifier works with variable voltage Vdd 25V - 45V