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Two Transistor forward not resetting "properly"

cupoftea

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Hi,
We are doing an offline 2 Tran Forward, 120kHz, 24vout, 130Wout. No PFC.
At 240VAC in, we see the following two VDS waveforms for top and bottom FETs.
(Red = Low FET Vds, Blue = Top FET Vds).
The Low FET is directly driven, but the Hi FET is driven via a gate drive transformer.
As expected, and can be seen, the Low FET turns off first.
And as expected, and can be seen, the Low FET also turns off first.

At turn off, we might expect each Vds to go to max...since the two reset diodes should both be conducting.
But as can be seen, only the low FET takes the full rail voltage. For some reason, the reset diode "below" the Hi FET
doesn't conduct, as is obvious from the attached. Instead, we first see some ringing, which is obviously the leakage inductance ringing out.
When both traces go horizontal, that is when the primary has demagnetised, and then both secondary diodes take part
in the conduction of the falling output inductor current.
Its almost as if the top FET is conducting the resetting magnetising current by being in the linear region.

Would you agree?

Though i am looking into whether there is some "situation" here with the leakage currents of the two diff probes that are used.
The SMPS is supplied via an isolation transformer.
 

Attachments

  • TopFET_Blue__LowFET_Red.png
    TopFET_Blue__LowFET_Red.png
    39 KB · Views: 67
it would be more meaningful to look at the low fet Vds, and the High side fet Vs to gnd . . . and the Vout of the Tx using your diff probe ....

At the end of the day - if you want symmetric waveforms across the mosfets ( I assume the above were taken at quite low load ) put the same gate drive to the fets.
 
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Thanks, though that scope is taken with it on max load.
The top FET is running hotter than the lower FET by a good 10-12 degrees C.
I suspect that the top FET somehow got damaged when the output freewheel diode blew up, in an earlier test session.
(a diode with too high trr was accidentally used and it overheated).

if you want symmetric waveforms across the mosfets
I think this is a topic worthy of serious lengthy research, because why would someone want the same gate drive to each FET?
(i guess to evenly distribute the switching losses, but that can still be done with differing waveforms to each)

This has been discussed previously on edaboard, but i cant now find it. If one fet has a faster drive, then it takes all the turn off losses, but less of the turn on losses....so it pretty much tends to even out the overall losses between the two fets, even if the fet drives are different.

I mean, having two coils in the GDT, for top and bottom fets, makes the design and manufac of that GDT more complicated, (to get nice equal and good coupling for each coil) and you also have more components, so why do it...why not just drive the bottom fet directly.?

I suspect the answer lies in Chinese imports of SMPS...where they deliberately make the transformers more awkward to wind, knowing that western fingers just wont be able to hack the extra winding awkwardness of a two coil output GDT......so the product just keeps getting ordered from China.....is this right?

I mean, if you wind a two coil output GDT, ___pri half 1, sec1, sec2 pri half 2____, (ie sandwiched) then you haven't got equal coupling
of the two output coils to the primary anyway....so why bother?
____----_____----____
As can be seen from the following attached, there is no problem with the fets of a 2 tran forward not
turning on at the same time. It really doesn't matter.
The mystery of why some drive both upper and lower fets from coils from the same gate drive transformer
also possibly harks back to the days of the half bridge.
Obviously in a half bridge, both must never turn on at the same time, and so if driven from the same transformer,
then it assured that one was always high when the other was low.
Why this then got carried over to the 2 tran forward is probably just a matter of "doing things the
same way"?

But its a waste of components and makes the gate drive transformer more complex than it needs to be.
___----_____---
 

Attachments

  • 2TF _dleayed fet drive.png
    2TF _dleayed fet drive.png
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  • 2TF_LT1243_delayed fet drive.zip
    4.8 KB · Views: 42
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Hi,
For this , we need a SMA diode which has very low trr and very low turn-on time too......to act as the reset diodes.
US1M doesnt state its turn-on time in datasheet.
Do you know of a nice cheap one

US1M

The upper reset diode is not turning on quick enough and so the Lmag and leakage are both going into wild ringing mode madness.
The lower one also doesnt turn on quick enough (its also US1M) but the lower fets internal diode is dealing with that.

We need a diode that has fast turn on and fast turn off. US1M just isnt up to it...amazed they dont give turn on time in US1M datasheet.
But may just end up snubbing it, since a 1R sense res in series with the upper reset didoe, as attached, shows the reset is happening amidst the wild ringing
 

Attachments

  • Reset current.png
    Reset current.png
    46.3 KB · Views: 46
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