Two-switch forward converter vs Push-Pull Converter

The two-switch forward converter is the preferred converter topology for achieving higher efficiency. This converter tropology handles high output currents and uses two power switches to control energy flow.

Whichever you choose, the most significant thing for your efficiency will be the use of synchronous rectifiers.
But yes,
Push pull = bad news.
Its the leakage L and the magnetising L energys...you have to dissipate them in a snubber.
So go for 2 switch forward, or active clamp forward means you only need one primary fet in the power path.
Though i reckon at 600W, and all that current, you would best do a full bridge. If i was you, due to your high output current....i would do Full Bridge with current doubler rectifier....it just means you have a single primary coil, and 2 output inductors....make it synchronous.

I dont know if you need isolation or not...but even if you dont need isolation, ,you should still use a transformer topology at your high power and relatively high voltage input, since they will give you the benefit of the leakage inductance snubbering, which reduces problems due to reverse recovery of diodes.

Also, the transformer gives your load some protection from vin in case of failure.

Thanks for reply.

Isolation is required in the design.

Regards

First boost voltage and then use LLC, coupled with synchronous rectification

To be honest, with the 50A output, id go two of: two tran forward in parallel.
LTC3705 LTC3726 i think will do it....or some other analog.com ones.

Have a load share chip to pllel them.
Or just do a bit of vout droop to them.
or just clamp each to 25A max output current.

2 sw fwd has a half utilised transformer, i.e. it is in a power pulse to the sec side 48% or less of the time

push pull is also not fully utilised as only one pri wdg doing useful work at any time, so some of the copper is idle at any one time

half bridge Tx is fully utilised for FWR on sec side

2 sw fwd has a half utilised transformer, i.e. it is in a power pulse to the sec side 48% or less of the time

Click to expand...

Thanks, Yes i appreciate, but the 50A output needs two converters in parallel....(if wanting to be cheap), and two full bridges in parallel is more components than two 2_tran_fwds in pllel.

Half bridge yes......though ayk, primary current is greater.........and it gives the OP the decision of voltage_mode vs current_mode.......the entire power electronics world has not come together to decide about this..........is current mode ok with a modicum of slope added?.....or should OP do full voltage mode?.......and what about when voltage mode gets overloaded, etc etc....and goes into peak current mode anyway.......maybe OP should. do voltage mode and just rate the rail caps for the full rail voltage.

And OP should put a series capacitor in series with the primary if doing voltage mode half bridge....ditto voltage mode full bridge...but full bridge can be done in currnt mode

....So that would be two half bridges in pllel.......unless OP wants less primary current, in which case, two 2TranFwds in pllel.

To do 2TranFwd with high duty cycle, all OP needs is a wee converter to give them a rail of 72/0.7 volts.......then feed the reset current back to that....and voila.....OP can do 2TranFwd with 70% duty cycle.

Look at analog.com's range of chipsets....they offer for 2TranFwd for the OP, but they offer no chipsets for Half Bridge...........Fairchild used to offer for OPs spec with half bridge.........and with average currnt mode control (LM50XX?)...but those chips are now withdrawn.

Dr Ridley, Dr Basso, and many others, are very down-talking of half bridge in current mode.......they dont say "oh but its ok with a dash of slope added"

1/2 bridge needs ave curr mode - they don't say that either - but it's another fact ....

The 7th post of this.....


...as you know....links to an article that says that half bridge with certain level of added slope is ok with current mode....presumably you just have to add that slope, then when it goes into overload, you make sure the rail-splitter caps are rated for the full rail voltage.

not sure what your point is - experienced designers know what can and can't be done - people with limited experience are always guessing - power electronics requires a lot of knowledge and a lot of maths & physics based understanding.

Thanks, though as you know, there is no publicly available, and widely accepted, maths or physics to assure us exactly how much added slope makes current mode half bridge ok. (with rail caps rated for the full v(rail) in case of overload).

Am sure many on this forum , and elsewhere, would like an answer to this. Many such as myself, hover this forum for any answer to this......the two tran forward alternative is not as good unless you put all sorts of bells and whistles with it to allow >50% duty.

And I could actually bore the forum stiff by recounting all the weird and wonderful plethora of circuitry on offer over the web, that gets used to get over the half bridge imbalance problem.

Have reverse engineered many half bridges to see how they were doing it...but they were just constant duty cycle half bridges in open loop mode, and incidentally literally using the leakage inductor instead of an output inductor.

The complete abscence of half bridge ACDC PWM chips mirrors this situation....so even the semi co's dont seem to know.

Fairchild brought out the LM5XXX (?) chip which offered average current mode half bridge chips, but they seem to have obseleted.....and they were only for <100v input (else the on-chip bootstrap drive is overvoltaged)

1) there is plenty of public info on how to treat the half bridge, with and without some slope comp added - it is having the knowledge to sort the wheat from the chaff that counts,

2) the 2 transistor forward works just fine - there are many changes one can make if one knows what one is doing

3) There are plenty of AC/DC chips, UC3856 and similar, dual output and single ended - one can design ones' own control as we - as we do - to overcome the irksome limitations of some of them

4) Ave curr mode is easy to implement - plenty of papers - the hard part is getting an accurate fast current signal and designing the control loop to make best use of the curr signal - you also get pk curr limiting for free.