sayurabh
Member level 4
plz reply my two questions my concepts aren not cleared
Q1.why in a CB transister in output characterstics or u cna say graph between collecter current(i) and collecter base(vcb) voltage, i is zero when vcb is between -1 and 0 why? plz tell me every book has written " this is a saturation region" but do not tell the basic concept behind this every graph has logic on the based of the logic graph is made and then logic is verified
Q2why in a cb transister considering the input characteristics that is graph between Emitter current(i) and emitter base voltage (vbe) ,on increasing collecter base voltage(vcb) the graph tends to more incline to the i that is y axis that is slope increases why tell me the reason
Q1.why in a CB transister in output characterstics or u cna say graph between collecter current(i) and collecter base(vcb) voltage, i is zero when vcb is between -1 and 0 why? plz tell me every book has written " this is a saturation region" but do not tell the basic concept behind this every graph has logic on the based of the logic graph is made and then logic is verified
Q2why in a cb transister considering the input characteristics that is graph between Emitter current(i) and emitter base voltage (vbe) ,on increasing collecter base voltage(vcb) the graph tends to more incline to the i that is y axis that is slope increases why tell me the reason