Turbo8051 Design - looking for similar module

[aegean.chou]

dw8051 verilog

Hi,
I'm designing a Turbo8051 ( 4 clocks per instruction ), anyone here
has a DW8051 core? I'm very interested in it's timing!
where can I find a similar module ( Winbond 77E58, Dallas 820 ).
Thanks!

 

[johnnyh]

The DW8051 is similar to Dallas DS80C320 in terms of hardware feature and instruction cycle timing.

except following features are difference :
Serial port,
Tmer2,
WDT,
Power fail detector,
Stop mode,
Timed access protection,
Parallel port.

 

[aegean.chou]

The Dallas 80C320 is similar more to Winbond 77E58!
and the Cypress EZUSB is consist of DW8051. Example:

DW8051 80C320/77E58
(Cycles) (Cycles)
JMP @A+DPTR 3 2
INC DPTR 3 2
MOVC A, @A+DPTR 3 2
MOVC A, @A+PC 3 2
RET 4 2
RETI 4 2

as I'm designing a Enhanced 8051, so I must to trace
8051 "Internal" bus timing, I hope to download a DW8051
and SIMULATION (at VCS, Modelsim or NC-Verilog ) it!
Anyone here can help me?!

 

[Ansunamu]

You can find some imformation about 8051 on these web

You can try these website

1. www.cast-inc.com
2. www.dophine.fr

Both of these two company are dedicate to design 8051 and also you can check Cygnal

 

[andy2000a]

How to do 1cyle 8051 ?

Hi
some fabless design a "turbo 8051" said 1 clock do 1 instruction ,
but how to do 1 inst in 1 machine cycle ?(it siad 8051 have 66MIPS
clock=66M ) , if 8051 use mov inst must need much more clock ..
even use rise/fall edge (but RTL design suggest use only 1 edge for design) ..
or then use PLL 66M --> high freq for internal 8051 timing ..

 

[aegean.chou]

1 clock per instruction

Hi,
There two types Turbo8051 : 4 clocks per instruction and 1 clock per instruction, but NOT mean ALL instruction only need 4/1 clock, only most ONE byte instruction (e.g. INC Rn, except INC DPTR etc.) can be execute in 4/1 clock, the difference between 4 clocks and 1 clock is that 4 clocks can generate ALE for EXTERNAL ROM access but 1 clock cann't!

 

[vsop]

Since most of current available 8051 core is build up with state machine, not micro-codes, I don't think the internal bus timing is important. What I suggest you is that you had better pay you attention on the compatiablity on external timing. You will meet the trouble if your external timing is NOT exactly same the popular one when you are searching the ICE debugger.

 

[se7en]

TRY www.dophine.fr

 

[ntxp]

try mc8051, come with source code.