TTL level questions: defining TTL

[John Xu]

TTL level questions

I have a question on the TTL level. For VDD=5V, it is defined as minimum VOH is larger than 2.4V and the maximum VOL is less than 0.4V. What I just want to know if my output level logic 1 is 5V and logic 0 is zero V, it is always seen as TTL level? Say in another way, is it the only requirements for TTL definition, i.e., VOH>2.4V, VOL<0.4V. No other requirements?

I asked this questions is just because I fount some product asssert their TTL output is implemented by open-clollector/drain and externally connected by a pullup resistor. But I can implement the logic VOH-5V and VOL-0V easily by my circuit, e.g. a comparator output. It need not any external compoments externally.

Can anyone help to clary it for me?

Thanks

 

[Davood Amerion]

TTL level questions

at input voltage above 2.0 Volts and below 5.0 Volts seen as logic high, and voltage 0-0.8 Volt seen logic low.
at output voltage above 2.4 Volts (Max. 5) generated for logic high and 0 - 0.4 Volt (Max) generated for logic low.
0.4 Volt difference is for noise margin.

 

[ptmsl]

Re: TTL level questions

It is like that any voltage within the limits you mentioned is interpreted as logic 0 or 1. The only problem with using open collector outputs is that you have to make sure that the low voltage is under 0.4V. If you can produce voltages outside the 0.4 to 2.4V region your circuit will work. Be careful to use the output from an IC that can go close to the supply rails.

 

[Gorgon]

Re: TTL level questions

It is like that any voltage within the limits you mentioned is interpreted as logic 0 or 1. The only problem with using open collector outputs is that you have to make sure that the low voltage is under 0.4V. If you can produce voltages outside the 0.4 to 2.4V region your circuit will work. Be careful to use the output from an IC that can go close to the supply rails.

Hi,
Open collector outputs does not normally have problems with the low level output(0). The selection of pullup resistor may cause some problem for the high level(1). If you use a resistor value too high, the timing of the signal may suffer, depending on the switching frequency. A TTL input draws current both high and low, less to high. The resistor chosen, must overcome both this current and the capacitance in question to make the switching flank steep enough. If you have more than one input to drive, everything adds up, resulting in a lower resistor value needed.

TOK

 

[John Xu]

Re: TTL level questions

It is like that any voltage within the limits you mentioned is interpreted as logic 0 or 1. The only problem with using open collector outputs is that you have to make sure that the low voltage is under 0.4V. If you can produce voltages outside the 0.4 to 2.4V region your circuit will work. Be careful to use the output from an IC that can go close to the supply rails.

Hi,
Open collector outputs does not normally have problems with the low level output(0). The selection of pullup resistor may cause some problem for the high level(1). If you use a resistor value too high, the timing of the signal may suffer, depending on the switching frequency. A TTL input draws current both high and low, less to high. The resistor chosen, must overcome both this current and the capacitance in question to make the switching flank steep enough. If you have more than one input to drive, everything adds up, resulting in a lower resistor value needed.

TOK

Thanks for the explaination. Is that to say except the vlotage level requriements, the drive capability is also in consideration? That is why some product use open-collector outputs which has big drive capability, is it?

If my circuit is pure cmos, then TTL output is implemented by my comparator output whcih is to drive the gate of mos transistor, which has no gate current as bipolar's base current, then I need not open-collector/drain toplogy?

Thanks

 

[Gorgon]

Re: TTL level questions

Hi John,
If you use cmos logic you need less drive capacity than bipolar TTL/ LSTTL. For high speed solutions you always need drive to overcome the cmos input capacitance, but if you use the same family of logic this is no problem. There are several reasons to use open collector outputs from comparators, one is the level requirement. Another is the ease of or-ing together several outputs to generate a window comparator without logic.
If you want to use a non-open collector comparator/opamp you need to make sure that the output is following the input specifications of the logic you select.

You must also be carful mixing together different logic famillies, and study and evaluate the output vs input characteristic for the two. Datasheets will give you loads of information, if you just look at them. You will also find application notes at the different manufacturers web sites, where you'll find hints and tips for the use of the circuits.

I hope this helps you on the way.

TOK

 

[hi_hedonist]

Re: TTL level questions

refer digital circuit design by malvino