TSMC65nm lvs error_nxwell_floating

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snang

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Hello, I encountered an error in the ERC result of LVS, as shown in the image below. Do you know how to resolve this issue? From the image, it seems to have occurred at the diode of the ESD pad.
 

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If it happens when you run the DRC of this cell alone, then it is okay, there is nothing you can do about it. But for the correct ERC checks you should specify supply and ground nets in Calibre.
 

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sidun.av said:
If it happens when you run the DRC of this cell alone, then it is okay, there is nothing you can do about it. But for the correct ERC checks you should specify supply and ground nets in Calibre.
Click to expand...
Hi, sidun.av thx you for your advice. But I tried to run the LVS. and then, LVS's result is smile. but erc result error is still exist. and that error is in the diode. so, how can I fix it?
 

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snang said:
Hi, sidun.av thx you for your advice. But I tried to run the LVS. and then, LVS's result is smile. but erc result error is still exist. and that error is in the diode. so, how can I fix it?
Click to expand...
Please, read my previous post carefully and tell me the results, otherwise, I won't be able to help you.
 

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snang said:
how can I specify supply and ground nets?
Is this correct?
View attachment 196549
Click to expand...
Yes, this is correct. But you only really need to include top-level power/ground nets (that are connected to the pads). Anyway, in your case Calibre will just ignore redundant nets.
 
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