im_pam
Member level 5

Dear friends,
1. I installed "tn65cmsp007k3_1_7a" version in cadence virtuoso version: IC6.1.7-64b. I have tried to design the inverter using nch_lvt and pch_lvt. When doing its layout and press shift+F, "pcell evaluation failed" error occurs (shared image for reference). This error occurs with any of the cells.
2. Also in CIW window i got the error "Error* loadContext: could not open file "/home/path/tsmcn65/../skill/64bit/tsmcn65tool.cxt"
i am newbie.Please help in resolving the problem.
1. I installed "tn65cmsp007k3_1_7a" version in cadence virtuoso version: IC6.1.7-64b. I have tried to design the inverter using nch_lvt and pch_lvt. When doing its layout and press shift+F, "pcell evaluation failed" error occurs (shared image for reference). This error occurs with any of the cells.
2. Also in CIW window i got the error "Error* loadContext: could not open file "/home/path/tsmcn65/../skill/64bit/tsmcn65tool.cxt"
i am newbie.Please help in resolving the problem.