In a real CMOS process (on p-substrate), the substrate must always be at the most negative voltage level. So your opAmp and comparator connection is ok (opAmp's -2.5V is identical to comparator's 0V = GND = substrate). Now just forget about the opAmp's ±2.5V supply and call it a 0 to +5V supply, too, same as the comparator's.
I suppose you have to supply the opAmp's inputs with a voltage level of about +2.5V in this case, which you usually realize by appropriate DC feedBack from the output. If your opAmp's input common mode range (ICMR) and OCMR is large enough, by this method you can probably adjust its quiescent output voltage to a required value, which is fine for the necessary comparator input voltage level.
If this isn't possible because your opAmp's ICMR or OCMR aren't large enough, you need some appropriate DC level adjustment between the opAmp's output and the comparator's input. If it's an ac application, this should easily be possible by capacitive coupling.
If you need more help, you better post your schematics.
BTW: Ever thought of combining both the opAmp and comp functions into the same opAmp application?