TSC (Timer Stamp Counter) ?= Counter

The time-stamp counter keeps an accurate count of every cycle that occurs on the processor. The Intel time-stamp counter is a 64-bit MSR (model specific register) that is incremented every clock cycle. On reset, the time-stamp counter is set to zero.

To access this counter, programmers can use the RDTSC (Read Time-Stamp Counter) instruction. This instruction loads the high-order 32 bits of the register into EDX, and the low-order 32 bits into EAX.

Time-stamp counter measures "cycles" and not "time". For example, two hundred million cycles on a 200 MHz processor is equivalent to one second of real time, while the same number of cycles on a 400 MHz processor is only one-half second of real time. Thus, comparing cycle counts only makes sense on processors of the same speed. To compare processors of different speeds, the cycle counts should be converted into time units, where:

# seconds = # cycles / frequency

Note: frequency is given in Hz, where: 1,000,000 Hz = 1 MHz

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